Job Description
Job Requirements:
Synopsys is hiring a Senior Expert ASIC Digital Design Engineer to develop digital RTL Verilog designs with focus on DDR.
In this role you will be responsible for:
Ideal candidate will:
When u call please mention you have found this job details on SherJobs
Tagged as: c#, Coding, debug, Debugging, developing, digital simulation, Information Technology, maintaining, Perl, Senior ASIC Digital Design Engineer (DDR), supporting RTL, Synthesizable Verilog, System Programming
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