Electrical Engineering
MTS – Library Design/standard Cell Full Time
Job Description
-Maxims Electronic Design Automation (EDA) group is seeking a Library Engineer to QA/develop logic IPs (standard cells, IOs and memories) to support digital and mixed-signal SOC designs at various technology nodes.
-Responsibilities may include, but are not limited to:
-Library and memory QA for digital, analog and mixed-signal design and PnR flows.
-Library QA methodology development and execution.
-IO cell characterization and model generation
-Debugging library, memory and design issues.
-Programming and scripting for flow and procedure automation.
*Minimum Qualifications
-3+ years of experience in library QA and development, Master’s degree in Electrical Engineering or equivalent
-Familiar with logic cell development and verification.
-Strong Knowledge with circuit design and transistor-level/gate-level simulations
-Experience with Cadence and Synopsys design, layout, and simulation tools
-Familiar with behavior (Verilog) languages
-Strong experience with Perl and/or Skill scripting languages
-Strong written and verbal communication skills.
Salary: Not Disclosed by Recruiter
Industry: Semiconductors / Electronics
Functional Area: Engineering Design, R&D
Role Category: R&D
Role: R&D Executive
Employment Type: Permanent Job, Full Time
Desired Candidate Profile
Education:UG -Any Graduate
PG – Any Postgraduate
Contact Details
Recruiter Name:Rinku
Contact Company:Maxim India Integrated Circuit Design Pvt Ltd.
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